1. Overview

The Universal Serial Bus (USB) is specified to be an industry standard extension to the PC architecture, with a focus on computer telephony, consumer and productivity appliances. USB is a cable bus that supports data exchange between a host computer and a wide range of peripherals. The attached peripherals share USB bandwidth through a host-scheduled, token-based protocol. Validation of function core includes validating the functionality of protocol layer and UTMI interface. Not only this, even inter-packet delays should be verified.

2. Validation of UTMI Block

This block handles the low level USB protocol and signaling. This includes features such as; data serialization and de-serialization, bit stuffing and clock recovery and synchronization. The primary focus of this block is to shift the clock domain of the data from the USB 2.0 rate to one that is compatible with the general logic in the ASIC.

Main task involved in the UTMI verification are:

  • SYNC/EOP Generating and checking.
  • Bit stuff error detection.
  • Ability to switch between HS and FS modes.
  • Resume signaling.
  • Wake – up and suspend detection.
  • Holding of register to stage transmit and receive data.
  • Data recovery from serial stream.
  • Support for USB 2.0 test modes.
  • Line state signaling.
  • Operation mode signaling.
  • Vendor controlled signaling.
  • Receiver and Transmitter Data Validity Signaling.
  • Receiver State machine transitions.
  • Receiver and transmitter error reporting.
  • Transmit state machine transitions.
  • HS detection handshaking.

3. Validation of Protocol Layer

Protocol layer interfaces with the system software. It initiates request packets and some of them need to be responded with response packets. Same way, it receives response packets and for some of them it responds with request packets. To validate such complex operations, we need packet generators and analyzers.

Main tasks involved in protocol layer verification:

  • Processing SETUP and SOF requests.
  • CRC error detection.
  • Payload size related validation.
  • Handling malformed packets.
  • IN and OUT request handling, including address and PID information.
  • packet rule checking
  • Bulk transferring.
  • Isochronous and interrupt transferring.
  • Acknowledgement signaling.
  • Error tracking.
  • PING protocol.
  • FIFO management for transmission and reception.
  • Special features incorporated along with basic model.


If you have any suggestion/feedback please email it to feedback@inno-logic.com